AN215656 - PSoC 6 MCU Dual-CPU System Design | 赛普拉斯半导体
AN215656 - PSoC 6 MCU Dual-CPU System Design
2019 年 8 月 01 日
AN215656 describes the dual-CPU architecture in PSoC 6 MCUs, which includes Arm® Cortex®-M4 and Cortex-M0+ CPUs, as well as an inter-processor communication (IPC) module. A dual-CPU architecture provides the flexibility to help improve system performance and efficiency, and reduce power consumption. The application note also shows how to build a simple dual-CPU design using the Cypress PSoC Creator™ Integrated Design Environment (IDE), and how to debug the design using various IDEs.