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AN42468 - On-Die Termination for QDR(R) II+/DDR II+ SRAMs | 赛普拉斯半导体

AN42468 - On-Die Termination for QDR(R) II+/DDR II+ SRAMs

最近更新: 
2021 年 3 月 02 日
版本: 
*I
AN42468 discusses on-die termination (ODT) scheme, implementation, advantages and power calculation for the QDR¿II+ and DDRII+ family of Synchronous SRAMs on the 65-nm technology devices.

AN42468 discusses on-die termination (ODT) scheme, implementation, advantages and power calculation for the QDRII+ and DDRII+ family of Synchronous SRAMs on the 65-nm technology devices.

ODT has the following advantages:

  • Improves signal integrity by having termination closer to the device inputs
  • Simplifies board routing
  • Saves board space by eliminating external resistors
  • Reduces cost involved in using external termination resistors

For ODT-enabled QDRII+ and DDRII+ SRAMs, ODT is offered on the following input signals:

  • Input clocks (K and Kb clocks)
  • Data input signals
  • Control signals (Byte Write Select signals)

The figure below shows the ODT implementation for Cypress QDRII+/DDRII+ SRAMs:

  

单击下面的链接,该链接将会提供一款能够根据所需的频率、总功耗和结温计算同步 SRAM Idd 电流的工具。

https://www.cypress.com/?docID=23984

请参阅各自的产品数据手册以获得公式中所使用的 Vdd 电压和 Idd 电流。

Dear valued customer,

Thank you for choosing our products. They come with all the know-how and passion that our engineers have put into it. As you probably already know, Cypress is now Infineon. This is a major step for our company, but also for the good of you. 

Reliability and business continuity are of utmost importance for us. Hence, we remain fully committed to honoring existing customer and distributor relationships. This includes offering the legacy Cypress product portfolio. We thank you very much for your trusting support.

For the full version of this message, please download the PDF version.

翻译文档仅作参考之用。我们建议您在参与设计开发时参考文档的英语版本。