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CE95300 - Delta Sigma ADC and I2C Master with PSoC 3/5LP | 赛普拉斯半导体

CE95300 - Delta Sigma ADC and I2C Master with PSoC 3/5LP

最近更新: 
2016 年 7 月 28 日
版本: 
1

This Starter Design provides an 8-channel multiplexed Delta Sigma ADC with sequencing logic. The analog inputs to the ADC are converted to digital sequentially and then made available through an I2C Master interface. This design additionally makes use of the LCD character display to provide a debugging output interface.