Clock Function (PDL_CLK) | 赛普拉斯半导体
Clock Function (PDL_CLK)
The CLK Component enables firmware control over the internal clocks in the device. It automatically includes the required Peripheral Driver Library (PDL) module and generates data structures required to use the CLK API functions.
Initial clock setup occurs in the Design-Wide Resources Clock Editor. Those settings are applied to the system prior to calling main(). The CLK component allows you to make adjustments to the clocking system from firmware.
CLK Component Parameter Editor