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Quadrature Decoder (TCPWM_QuadDec_PDL) | 赛普拉斯半导体

Quadrature Decoder (TCPWM_QuadDec_PDL)

最近更新: 
2018 年 3 月 26 日
版本: 
1.0
特性 符号图
  • 16- or 32-bit Counter
  • Counter Resolution of x1, x2, and x4 the frequency of phiA and phiB inputs
  • Index Input to determine absolute position
  • Peripheral Driver Library (PDL) Component (PDL Application Programming Interface (API) only)
 

TCPWM Quad Dec Diagram

 

概述

The TCPWM_QuadDec_PDL Component is a graphical configuration entity built on top of the cy_tcpwm driver available in the PDL. It allows schematic-based connections and hardware configuration as defined by the Component Configure dialog.

The TCPWM_QuadDec_PDL Component gives you the ability to count transitions on a pair of digital signals. 这些信号通常由安装在电机或跟踪球上的速度/位置反馈系统提供。

The signals, typically called phiA and phiB, are positioned 90 degrees out of phase, which results in a Gray code output. 格雷码是每次计数时仅有一位变化的序列。这对避免假信号非常重要。它还可以实现方向和相对位置的检测。第 3 个可选信号命名为 Index(索引),为每转一圈产生一次绝对位置的参考。