Timer / Counter (TCPWM_Counter_PDL) | 赛普拉斯半导体
Timer / Counter (TCPWM_Counter_PDL)
The TCPWM_Counter_PDL Component is a graphical configuration entity built on top of the cy_tcpwm driver available in the PDL. It allows schematic-based connections and hardware configuration as defined by the Component Configure dialog.
The TCPWM_Counter_PDL Component allows rapid configuration of the TCPWM hardware for Timer/Counter functionality. This Component provides a method to measure time intervals or count external events.