CY14B512P: 512-Kbit (64 K × 8) Serial (SPI) nvSRAM with Real Time Clock | 赛普拉斯半导体
CY14B512P: 512-Kbit (64 K × 8) Serial (SPI) nvSRAM with Real Time Clock
- 512-Kbit nonvolatile static random access memory (nvSRAM)
- Internally organized as 64 K × 8
- STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by the user using HSB pin (Hardware STORE) or SPI instruction (Software STORE)
- RECALL to SRAM initiated on power-up (Power-Up RECALL) or by serial peripheral interface (SPI) instruction (Software RECALL)
- 1 百万次存储至量子井的循环
- 数据保留时间：20 年
- Real time clock (RTC)
- Full featured RTC
- RTC 备用电容或电池
- Backup current of 0.35 μA (typical)
- High-speed SPI
- 40 MHz clock rate – SRAM memory access
- 25 MHz clock rate – RTC memory access
- Supports SPI mode 0 (0,0) and mode 3 (1,1)
- Write protection
- Hardware protection using Write Protect (WP) pin
- Software protection using Write Disable instruction
- Software block protection for 1/4, 1/2, or entire array
- Single 3 V + 20%, –10% operation
- Average active current of 10 mA at 40 MHz operation
- Industry standard configurations
- 16-pin small outline integrated circuit (SOIC) package
- Restriction of hazardous substances (RoHS) compliant
The Cypress CY14B512P combines a 512-Kbit nvSRAM with a full-featured real time clock in a monolithic integrated circuit with serial SPI interface. 该存储器采用“64 K 字，每字 64 位”的组织方式。嵌入式非易失性组件通过采用量子井技术，打造出世界上最可靠的非易失性存储器。SRAM 能够实现无限次读写循环，而量子井单元则能够提供高度可靠的非易失性数据存储空间。断电时，数据会从 SRAM 自动转移到非易失性元件中（“存储”操作）。On power-up, data is restored to the SRAM from the nonvolatile memory (RECALL operation). The STORE and RECALL operations can also be initiated by the user through SPI instruction.
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