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CY14C256I, CY14B256I, CY14E256I: 256-Kbit (32 K × 8) Serial (I2C) nvSRAM with Real Time Clock | 赛普拉斯半导体

CY14C256I, CY14B256I, CY14E256I: 256-Kbit (32 K × 8) Serial (I2C) nvSRAM with Real Time Clock

最近更新: 
2018 年 1 月 29 日
版本: 
*J

特性

  • 256-Kbit nonvolatile static random access memory (nvSRAM)
    • Internally organized as 32 K × 8
    • STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by using I2C command (Software STORE) or HSB pin (Hardware STORE)
    • RECALL to SRAM initiated on power-up (Power-Up RECALL) or by I2C command (Software RECALL)
    • 通过小型电容在断电时自动存储数据
  • 高可靠性
    • 无限的读、写和数据恢复循环
    • 1 百万次存储至量子井的循环
    • 数据保留时间:20 years at 85 °C
  • Real Time Clock (RTC)
    • Full-featured RTC
    • 看门狗定时器
    • 带可编程中断的时钟警报
    • Backup power fail indication
    • Square wave output with programmable frequency (1 Hz, 512 Hz, 4096 Hz, 32.768 kHz)
    • RTC 备用电容或电池
    • Backup current of 0.45 μA (typical)
  • High-speed I2C interface
    • Industry standard 100 kHz and 400 kHz speed
    • Fast mode Plus 1 MHz speed
    • High speed: 3.4 MHz
    • Zero cycle delay reads and writes
  • Write protection
    • Hardware protection using Write Protect (WP) pin
    • Software block protection for one-quarter, one-half, or entire array
  • I2C access to special functions
    • Nonvolatile STORE/RECALL
    • 8-byte serial number
    • Manufacturer ID and Product ID
    • Sleep mode
  • 低功耗
    • Average active current of 1 mA at 3.4 MHz operation
    • Average standby mode current of 250 μA
    • Sleep mode current of 8 μA
  • Industry standard configurations
    • Operating voltages:
      • CY14C256I: VCC = 2.4 V to 2.6 V
      • CY14B256I: VCC = 2.7 V to 3.6 V
      • CY14E256I: VCC = 4.5 V to 5.5 V
    • 工业温度
    • 16-pin small outline integrated circuit (SOIC) package
    • Restriction of hazardous substances (RoHS) compliant

概述

The Cypress CY14C256I/CY14B256I/CY14E256I combines a 256-Kbit nvSRAM with a full-featured RTC in a monolithic integrated circuit with serial I2C interface. 该存储器采用“64 K 字,每字 64 位”的组织方式。嵌入式非易失性组件通过采用量子井技术,打造出世界上最可靠的非易失性存储器。SRAM 能够实现无限次读写循环,而量子井单元则能够提供高度可靠的非易失性数据存储空间。断电时,数据会从 SRAM 自动转移到非易失性元件中(“存储”操作)。On power-up, data is restored to the SRAM from the nonvolatile memory (RECALL operation). The STORE and RECALL operations can also be initiated by the user through I2C commands.