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CY14C512Q/CY14B512Q/CY14E512Q, 512-KBIT (64K X 8) SPI NVSRAM | 赛普拉斯半导体

CY14C512Q/CY14B512Q/CY14E512Q, 512-KBIT (64K X 8) SPI NVSRAM

最近更新: 
2020 年 11 月 03 日
版本: 
*I
The Cypress CY14X512Q combines a 512-Kbit nvSRAM with a nonvolatile element in each memory cell with serial SPI interface.

特性

  • 512-Kbit nonvolatile static random access memory (nvSRAM) internally organized as 64 K × 8
    • STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by using SPI instruction (Software STORE) or HSB pin (Hardware STORE)
    • 在通电时启动(通电 RECALL)或者由 SPI 指令(软件 RECALL)启动数据恢复至 SRAM
    • Support automatic STORE on power-down with a small capacitor (except for CY14X512Q1A)
  • 高可靠性
    • 无限的读、写和数据恢复循环
    • 1million STORE cycles to QuantumTrap
    • 数据保留时间:20 years at 85 °C
  • 40-MHz, and 104-MHz High-speed serial peripheral interface (SPI)
    • 40-MHz clock rate SPI write and read with zero cycle delay
    • 104-MHz clock rate SPI write and SPI read (with special fast read instructions)
    • Supports SPI mode 0 (0,0) and mode 3 (1,1)
  • SPI access to special functions
    • Nonvolatile STORE/RECALL
    • 8-byte serial number
    • Manufacturer ID and Product ID
    • Sleep mode
  • Write protection
    • Hardware protection using Write Protect (WP) pin
    • Software protection using Write Disable instruction
    • Software block protection for 1/4, 1/2, or entire array
  • 低功耗
    • Average active current of 3 mA at 40 MHz operation
    • Average standby mode current of 150 μA
    • Sleep mode current of 8 μA
  • Industry standard configurations
    • Operating voltages:
      • CY14C512Q: VCC = 2.4 V to 2.6 V
      • CY14B512Q: VCC = 2.7 V to 3.6 V
      • CY14E512Q: VCC = 4.5 V to 5.5 V
    • 工业温度
    • 8- and 16-pin small outline integrated circuit (SOIC) package
    • Restriction of hazardous substances (RoHS) compliant



功能概述

The Cypress CY14X512Q combines a 512-Kbit nvSRAM with a nonvolatile element in each memory cell with serial SPI interface. 该存储器采用“64 K 字,每字 64 位”的组织方式。嵌入式非易失性组件通过采用量子井技术,打造出世界上最可靠的非易失性存储器。SRAM 能够实现无限次读写循环,而量子井单元则能够提供高度可靠的非易失性数据存储空间。Data transfers from SRAM to the nonvolatile elements (STORE operation) takes place automatically at power-down (except for CY14X512Q1A). On power-up, data is restored to the SRAM from the nonvolatile memory (RECALL operation). You can also initiate the STORE and RECALL operations through SPI instruction.

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Reliability and business continuity are of utmost importance for us. Hence, we remain fully committed to honoring existing customer and distributor relationships. This includes offering the legacy Cypress product portfolio. We thank you very much for your trusting support.

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