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CY2302: Frequency Multiplier and Zero Delay Buffer | 赛普拉斯半导体

CY2302: Frequency Multiplier and Zero Delay Buffer

最近更新: 
2017 年 5 月 15 日
版本: 
*I

Frequency Multiplier and Zero Delay Buffer

特性

  • 90 ps Typical Jitter OUT2
  • 200 ps Typical Jitter OUT1
  • 65 ps Typical Output-to-output Skew
  • 90 ps Typical Propagation Delay
  • Voltage range: 3.3V±5%, or 5V±10%
  • Output Frequency Range: 5 MHz to 133 MHz
  • Two Outputs
  • Configuration options allow various multiplications of the reference frequency.
  • Available in 8-pin SOIC Package
     

概述

The CY2302 is a two-output zero delay buffer and frequency multiplier. It provides an external feedback path allowing maximum flexibility when implementing the Zero Delay feature. This is explained further in the sections of this datasheet titled, How to Implement Zero Delay, and Inserting Other Devices in Feedback Path.

The CY2302 is a pin-compatible upgrade of the Cypress W42C70-01. The CY2302 addresses some application dependent problems experienced by users of the older device.