CY23EP05: 2.5 V or 3.3 V,10-220 MHz, Low Jitter, 5 Output Zero Delay Buffer | 赛普拉斯半导体
CY23EP05: 2.5 V or 3.3 V,10-220 MHz, Low Jitter, 5 Output Zero Delay Buffer
最近更新:
2018 年 2 月 20 日
版本:
*G
2.5 V or 3.3 V,10–220 MHz, Low Jitter, 5 Output Zero Delay Buffer
特性
- 10 MHz to 220 MHz maximum operating range
- Zero input-output propagation delay, adjustable by loading on CLKOUT pin
- Multiple low-skew outputs
- 30 ps typical output-output skew
- One input drives five outputs
- 22 ps typical cycle-to-cycle jitter
- 13 ps typical period jitter
- Standard and high-drive strength options
- Available in space-saving 150-mil SOIC package
- 3.3V or 2.5V operation
- Industrial temperature available
功能描述
The CY23EP05 is a 2.5 V or 3.3 V zero delay buffer designed to distribute low-jitter high-speed clocks and is available in a 8-pin SOIC package. It accepts one reference input, and drives out five low-skew clocks. The –1H version operates up to 220 (200) MHz frequencies at 3.3 V (2.5 V), and has a higher drive strength than the –1 devices. All parts have on-chip PLLs which lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad.