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CY7C1371S 18-Mbit (512K × 36) Flow-Through SRAM with NoBL™ Architecture | 赛普拉斯半导体

CY7C1371S 18-Mbit (512K × 36) Flow-Through SRAM with NoBL™ Architecture

最近更新: 
2016 年 4 月 15 日
版本: 
*F

The CY7C1371S is a 3.3 V, 512K × 36 Synchronous flow through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations with no wait state insertion.

Dear valued customer,

Thank you for choosing our products. They come with all the know-how and passion that our engineers have put into it. As you probably already know, Cypress is now Infineon. This is a major step for our company, but also for the good of you. 

Reliability and business continuity are of utmost importance for us. Hence, we remain fully committed to honoring existing customer and distributor relationships. This includes offering the legacy Cypress product portfolio. We thank you very much for your trusting support.

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