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CY7C4021KV13, CY7C4041KV13: 72-Mbit QDR™-IV HP SRAM | 赛普拉斯半导体

CY7C4021KV13, CY7C4041KV13: 72-Mbit QDR™-IV HP SRAM

最近更新: 
2017 年 8 月 15 日
版本: 
*O

72-Mbit QDR™-IV HP SRAM

特性

  • 72-Mbit density (4 M × 18, 2 M × 36)
  • Total Random Transaction Rate of 1334 MT/s
  • Maximum operating frequency of 667 MHz
  • Read latency of 5.0 clock cycles and Write latency of 3.0 clock cycles
  • Two-word burst on all accesses
  • Dual independent bi-directional data ports
  • Single address port used to control both data ports
  • Single data rate (SDR) control signaling
  • 如需更多信息,请参阅 PDF 文档

 

功能描述

 

The QDR-IV HP (High-Performance) SRAM is a high performance memory device that has been optimized to maximize the number of random transactions per second by the use of two independent bi-directional data ports.

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