CY7C4121KV13, CY7C4141KV13: 144-Mbit QDR™-IV HP SRAM | 赛普拉斯半导体
CY7C4121KV13, CY7C4141KV13: 144-Mbit QDR™-IV HP SRAM
最近更新:
2017 年 8 月 15 日
版本:
*Q
144-Mbit QDR™-IV HP SRAM
特性
- 144-Mbit density (8 M × 18, 4 M × 36)
- Total Random Transaction Rate of 1334 MT/s
- Maximum operating frequency of 667 MHz
- Read latency of 5.0 clock cycles and write latency of 3.0 clock cycles
- Two-word burst on all accesses
- Dual independent bidirectional data ports
- Single address port used to control both data ports
- Single data rate (SDR) control signaling
- 如需更多信息,请参阅 PDF 文档
功能描述
The QDR-IV HP (High-Performance) SRAM is a high-performance memory device that has been optimized to maximize the number of random transactions per second by the use of two independent bidirectional data ports.
翻译文档仅作参考之用。我们建议您在参与设计开发时参考文档的英语版本。