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PSOC 6 MCU: CY8C61X4 DATASHEET | 赛普拉斯半导体

PSOC 6 MCU: CY8C61X4 DATASHEET

最近更新: 
2021 年 8 月 10 日
版本: 
*A

概述

PSoC® 6 MCU is a high-performance, ultra-low-power and secured MCU platform, purpose-built for IoT applications. The CY8C61x4 product line, based on the PSoC 6 MCU platform, is a combination of a dual CPU microcontroller with low-power flash technology, digital programmable logic, high-performance analog-to-digital conversion and standard communication and timing peripherals.

特性

注意: In PSoC 61 the Cortex M0+ is reserved for system functions, and is not available for applications.

32-bit Dual CPU Subsystem

  • 150-MHz Arm® Cortex®-M4F (CM4) with single-cycle multiply (Floating Point and Memory Protection Unit)
  • 100-MHz Cortex-M0+ (CM0+) with single-cycle multiply and MPU
  • User-selectable core logic operation at either 1.1 V or 0.9 V
  • Active CPU current slope with 1.1-V core operation
    • Cortex-M4: 40 μA/MHz
    • Cortex-M0+: 28 μA/MHz
  • Active CPU current slope with 0.9-V core operation
    • Cortex-M4: 27 μA/MHz
    • Cortex-M0+: 20 μA/MHz
  • Three DMA controllers

Memory Subsystem

  • 256-KB application flash and 32-KB supervisory flash (SFlash); read-while-write (RWW) support. Two 8-KB flash caches, one for each CPU.
  • 128-KB SRAM with programmable power control and retention granularity
  • One-time-programmable (OTP) 1-Kb eFuse array

Click here to download the spreadsheet with the consolidated list of pinouts and pin alternate functions.

Dear valued customer,

Thank you for choosing our products. They come with all the know-how and passion that our engineers have put into it. As you probably already know, Cypress is now Infineon. This is a major step for our company, but also for the good of you. 

Reliability and business continuity are of utmost importance for us. Hence, we remain fully committed to honoring existing customer and distributor relationships. This includes offering the legacy Cypress product portfolio. We thank you very much for your trusting support.

For the full version of this message, please download the PDF version.