S70FS01GS, 1-Gb (128 MB), 1.8 V FS-S Flash | 赛普拉斯半导体
S70FS01GS, 1-Gb (128 MB), 1.8 V FS-S Flash
The FS-S Family connects to a host system via a Serial Peripheral Interface (SPI). Traditional SPI single bit serial input and output (Single I/O or SIO) is supported as well as optional two bit (Dual I/O or DIO) and four bit wide Quad I/O (QIO) or QPI, also known as Quad Peripheral Interface (QPI) serial commands. This multiple width interface is called SPI Multi-I/O or MIO. In addition, there are Double Data Rate (DDR) read commands for QIO and QPI that transfer address and read data on both edges of the clock. The FS-S Eclipse architecture features a Page Programming Buffer that allows up to 512-bytes to be programmed in one operation, resulting in faster effective programming and erase than prior generation SPI program or erase algorithms. The S70FS01GS device is a dual die stack of two FS512S die.