用户模块数据表：24-Bit Pseudo Random Sequence Generator Datasheet PRS24 V 3.4 (CY8C29/27/24/22/21xxx, CY8C23x33, CY8CTST110, CY8CTMG110, CY8CTST120, CY8CTMG120, CY8CTMA120, CY8C21x45, CY8C22x45, CY8CTMA140, CY8CTMA30xx, CY8C28x45, CY8CPLC20, C... | 赛普拉斯半导体
用户模块数据表：24-Bit Pseudo Random Sequence Generator Datasheet PRS24 V 3.4 (CY8C29/27/24/22/21xxx, CY8C23x33, CY8CTST110, CY8CTMG110, CY8CTST120, CY8CTMG120, CY8CTMA120, CY8C21x45, CY8C22x45, CY8CTMA140, CY8CTMA30xx, CY8C28x45, CY8CPLC20, C...
最近更新：
2015 年 12 月 22 日
版本：
3.4
功能和概述
- 2 to 24-bit general purpose pseudo-random number generator uses three PSoC blocks
- Data input clocking up to 48 MHz
- Programmable polynomial and seed values
- 串行输出位流
- Computed pseudo-random number can be read directly from the LFSR
The PRS User Module is a modular linear feedback shift register (LFSR) that generates a pseudo random bit stream. The polynomial and starting seed values can be specified to define its output number sequence.
相关文件
| 文件标题 | 语言 | Size | 最近更新 |
|---|---|---|---|
 24 BIT Pseudo Random Sequence Generator Datasheet , PRS24 V 3.4.pdf |
英语 | 234.01 KB | 2015 年 12 月 22 日 |