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用户模块数据表:Stochastic Signal Density Modulation Datasheet SSDM V 1.0 (CY8CLED02/04/08/16, CY8CLED16P01, CY8CLED0xD, CY8CLED0xG, CY8C29x66, CY8C27x43, CY8C24x94, CY8C21x23, CY8CPLC20) | 赛普拉斯半导体

用户模块数据表:Stochastic Signal Density Modulation Datasheet SSDM V 1.0 (CY8CLED02/04/08/16, CY8CLED16P01, CY8CLED0xD, CY8CLED0xG, CY8C29x66, CY8C27x43, CY8C24x94, CY8C21x23, CY8CPLC20)

最近更新: 
2014 年 7 月 28 日
版本: 
1.0

功能和概述

  • LED brightness control
  • 2- to 8-, 16-, 24- or 32-bit resolution
  • Input clocking up to 48 MHz
  • Selectable output signal density
  • Interrupt on Compare true

The Stochastic Signal Density Modulation (SSDM) User Module provides the compare output of a SSDM hardware block to a row interconnect. The stochastic counter produces all codes in range 1..2n-1, but the codes are randomly ordered. The resolution is selected in the device editor, and the resolution setting automatically chooses the correct irreducible simple polynomial. The signal density may be chosen in the device editor or using an API call, the setting corresponds to the Signal Density register in the SSDM hardware block. The compare type can be selected in the device editor.