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RoboClock™ and RoboClock II™ Test Mode | 赛普拉斯半导体

RoboClock™ and RoboClock II™ Test Mode

最近更新: 
2020 年 5 月 28 日
版本: 
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This document discusses the test mode capabilities of the RoboClock™ and RoboClock II™ family. It begins with an introduction to these devices and then discusses how to use the test mode features. The RoboClock II test mode disables the PLL, which allows you to debug your system design. Using the test mode function can improve your design and give you additional stability.

This document discusses the test mode capabilities of the RoboClock™ and RoboClock II™ family. It begins with an introduction to these devices and then discusses how to use the test mode features. The RoboClock II test mode disables the PLL, which allows you to debug your system design. Using the test mode function can improve your design and give you additional stability.