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赛普拉斯面向 PSoC® 3 和 PSoC 5 架构的增强的 PSoC Creator™ 集成设计环境新版本 2.1  | 赛普拉斯半导体

赛普拉斯面向 PSoC® 3 和 PSoC 5 架构的增强的 PSoC Creator™ 集成设计环境新版本 2.1 

最近更新: 2012 年 8 月 17 日

New Software Makes PSoC 3 and PSoC 5 Digital Designs up to 83% Faster While Simplifying Analog Designs and Improving Ease of Use With Over 100 New Features and Improvements

SAN JOSE, Calif., 2012 年 8 月 20 日 – Cypress Semiconductor Corp. (NASDAQ: CY) today introduced PSoC Creator™ 2.1, the Integrated Design Environment (IDE) for the PSoC® 3 and PSoC 5 programmable system-on-chip families. The new software update includes over 100 new features and enhancements, accelerating digital designs more than 80% on average, simplifying analog designs, and greatly improving ease of use.  Users can get more information on PSoC Creator and download it free at

PSoC Creator allows users to configure PSoC programmable hardware into a custom one-chip solution.  It includes a rich library of over 75 fully characterized analog and digital Components—“virtual chips,” represented by an icon—that users can drag-and-drop into a design and configure to suit a broad array of application requirements. Components integrate system interfaces and discrete ICs into a PSoC solution, reducing BOM costs and board-space. Cypress regularly releases “Component Packs” that provide new Components and update existing Components.

PSoC Creator 2.1 features improved programmable digital logic placement and routing, increasing maximum peripheral speeds. For example, the new placement and routing algorithms boosts the Pulse Width Modulator (PWM) Component’s input frequency to 44 MHz—a 76% gain that enables higher resolution PWMs and faster switching speeds for a wide variety of applications such as motor and power control. Programmable digital components including timers, counters and others also benefit from this dramatic performance improvement, with increases of more than 80% on average.

The new Analog Device Editor simplifies the development and debugging of analog designs. Developers draw their analog circuit in the PSoC Creator schematic-entry tool. In the build cycle, PSoC Creator automatically configures the underlying PSoC programmable hardware. It enables developers to optimize analog circuits graphically and lock them so they never change. More information and discussions about this and other exciting new PSoC Creator features can be found in the Cypress Developer Community at

“PSoC programmable hardware and easy-to-use development tools enable designers to create custom one-chip mixed-signal solutions that are built expressly for their applications,” said Gahan Richardson, Vice President of Cypress’s Platform PSoC Business Unit. “With PSoC Creator 2.1, we have greatly simplified analog design entry and increased the performance of programmable digital designs for our growing community of users.”

About PSoC Creator
PSoC Creator is a unique design software that enables engineers to design the way they think, using schematic-based design capture along with certified, pre-packaged peripherals to keep system creation independent of the target PSoC device. Instead of trawling through device documentation and memorizing register maps, users simply lay out the design, just as they would on paper or a whiteboard, and let the tool translate it into the PSoC configuration. With PSoC Creator, customers create designs according to application requirements, not the limitations of the target device. Re-targeting to new devices is as simple as rebuilding an application, so porting designs between PSoC devices becomes a snap, including migrating working designs seamlessly from 8- to 32-bit devices.

PSoC Creator automatically places components into the selected PSoC device, routes all on-chip signals and directs I/O to the optimum pins. Each peripheral component is carefully parameterized so that the implementation is automatically optimized to fit the developer’s needs perfectly with no wasted resources. The build process generates a consistently-named set of APIs for each component that allows the software developer to control the hardware without knowing the underlying register set. Customized designs, and their associated APIs, can be saved in a library for future reuse and easily shared within an organization.

PSoC -- Because Change Happens
PSoC devices employ a highly configurable system-on-chip architecture for embedded control design, offering a flash-based equivalent of a field-programmable ASIC without lead-time or NRE penalties. PSoC devices integrate configurable analog and digital circuits, controlled by an on-chip microcontroller, providing both enhanced design revision capability and component count savings. A single PSoC device can integrate as many as 100 peripheral functions saving customers design time, board space and power consumption while improving system quality and reducing system cost.

The flexible PSoC resources allow designers to future-proof their products by enabling firmware-based changes during design, validation, production, and in the field. The unique PSoC flexibility shortens design cycle time and allows for late-breaking feature enhancements. All PSoC devices are also dynamically reconfigurable, enabling designers to morph internal resources on-the-fly, utilizing fewer components to perform a given task. More information about PSoC products is available at and free online training is at

赛普拉斯提供各种高性能、混合信号、可编程解决方案,为客户产品能够快速上市赢得时间并提供卓越的系统价值。Cypress offerings include the flagship PSoC 1, PSoC 3, and PSoC 5 programmable system-on-chip families and derivatives, CapSense touch sensing and TrueTouch solutions for touchscreens. 赛普拉斯是 USB 控制器领域的全球领先者,它所拥有的高性能 West Bridge 解决方案可加强多媒体手机、PC 和平板电脑的连接性并提高其性能。赛普拉斯同时还是 SRAM 存储器的全球领导厂商。赛普拉斯可为消费、移动电话、计算、数据通信、汽车、工业和军事等多种市场提供服务。Cypress trades on the NASDAQ Global Select Market under the ticker symbol CY. Visit Cypress online at

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Cypress, the Cypress logo, PSoC, CapSense, West Bridge and EZ-USB are registered trademarks and PSoC Creator, PSoC Designer, CyFi and TrueTouch are trademarks of Cypress Semiconductor Corp. All other trademarks are property of their owners.

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