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Cypress Webinar on November 11 to Demonstrate Game-Changing Embedded Design Methodology Enabled By PSoC® 3 and PSoC 5 Architectures | 赛普拉斯半导体

Cypress Webinar on November 11 to Demonstrate Game-Changing Embedded Design Methodology Enabled By PSoC® 3 and PSoC 5 Architectures

最近更新: 2018 年 3 月 7 日

Free Online Seminar Hosted with EE Times Will Explore How to Overcome Common Design Challenges with True System-Level Programmability

SAN JOSE, Calif., 2009 年 10 月 29 日 – Cypress Semiconductor Corp. (NYSE: CY) today announced a free, online seminar that presents a revolutionary new embedded design platform based on Cypress’s PSoC® 3 and PSoC 5 architectures. The 60-minute webinar, entitled “Introducing an Evolutionary Leap in Embedded Design,” will be presented in conjunction with EE Times on Wednesday, November 11 at 9:00 a.m. PST.

The webinar will explore the embedded design challenges engineers face on a day-to-day basis and how to overcome them with true system-level programmability – the ability to use programmable resources to create, change and reuse designs quickly and efficiently in software – as exemplified by the PSoC programmable system-on-chip architecture. This new embedded design platform is powered by the PSoC Creator™ Integrated Development Environment, which introduces a unique schematic-based design methodology along with fully tested, pre-packaged analog and digital peripherals easily customizable through user-intuitive wizards and APIs to meet specific design requirements.

Attendees will learn how to apply a system-level programmable design methodology to embedded designs immediately, enabling adaptability to design changes, faster time-to-market, simplified analog design and protection of design IP. The webinar will conclude with a detailed Q&A period to address participants’ applications and designs.

About PSoC 3 and PSoC 5
The new PSoC 3 and PSoC 5 architectures include high-precision programmable analog capability (up to 20-bit resolution for an Analog to Digital Converter) and expanded programmable digital resources integrated with powerful, industry-standard MCU cores and ample memory and communications peripherals. The PSoC 3 devices are based on a new, high-performance 8-bit 8051 processor, while the PSoC 5 devices include a powerful 32-bit Arm Cortex™-M3 processor. The new products provide designers with a seamless, programmable design platform, enabling easy migration from 8 to 32 bits. The robust features of these new solutions dramatically expand the applications and markets that PSoC can address, including automotive, portable medical, industrial and many more. More information about PSoC products is available at https://www.cypress.com/psoc and free online training is at https://www.cypress.com/psoctraining.

关于赛普拉斯
赛普拉斯提供各种高性能、混合信号、可编程解决方案,为客户产品能够快速上市赢得时间并提供卓越的系统价值。赛普拉斯的产品包括其旗舰产品 PSoC® 可编程片上系统系列及其衍生产品,比如 PowerPSoC® 高压和 LED 照明解决方案、CapSense® 触摸感应以及 TrueTouch™ 触摸屏解决方案。赛普拉斯是 USB 控制器领域的全球领先者,它所拥有的高性能 West Bridge® 解决方案可加强多媒体手机的连接性并提高其性能。赛普拉斯同时在高性能存储器和可编程计时设备方面处于领先地位。赛普拉斯可为消费、移动电话、计算、数据通信、汽车、工业和军事等多种市场提供服务。Cypress trades on the NYSE under the ticker symbol CY. Visit Cypress online at https://www.cypress.com.

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Cypress, the Cypress logo, PSoC, PowerPSoC, CapSense and West Bridge are registered trademarks and PSoC Creator, PSoC Designer and TrueTouch are trademarks of Cypress Semiconductor Corp. All other trademarks are property of their owners.

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