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赛普拉斯高密度 QDR™II 和 QDRII SRAM 设备被 Altera 选用于其 28-nm Stratix V FPGA 开发套件 | 赛普拉斯半导体

赛普拉斯高密度 QDR™II 和 QDRII SRAM 设备被 Altera 选用于其 28-nm Stratix V FPGA 开发套件

最近更新: 2011 年 10 月 18 日

Stratix V GX FPGA Development Kit Supports High Performance Networking
Applications With up to 100-Gbps Line Rates

San Jose, Calif., 2011 年 10 月 19 日- Cypress Semiconductor Corp. (Nasdaq: CY), the industry leader in SRAMs, today announced Altera has selected Cypress Quad Data Rate™ II (QDR™II) and QDRII SRAMs for use in its 28-nm Stratix® V GX FPGA Development Kit. Cypress’s SRAMs enable the Stratix V FPGA Development Kit to deliver line rates up to 100 Gbps.

The Stratix V GX FPGA Development Kit provides a complete design environment to start developing Altera’s high-performance 28-nm FPGAs for use in a broad range of applications such as networking line cards, advanced LTE basestations, high-end RF cards and military radar. The kit enables designers to develop and test Stratix V GX FPGAs with the latest protocols (PCIe® Gen3) and memory subsystems, including DDR3, QDRII and QDRII . The 4.5-MB of QDRII memory featured on the Stratix V GX FPGA development board interface with the FPGA through the device’s hard memory controllers, delivering maximum performance and the lowest latency. For more information on the Stratix V family, visit www.altera.com/stratixv.

The QDRII devices feature On-Die Termination (ODT), which improves signal integrity, reduces system cost, and saves board space by eliminating external termination resistors. They include densities up to 144 Mbit and speeds up to 550 MHz.  With an optional burst of 4, the 144-Mbit QDRII is capable of 550 million transactions per second, and employs 2.5-cycle latency. The Burst of 2 device delivers up to 666 million transactions per second, offering the highest performance memory interface available. The 65-nm SRAMs are ideal for networking applications, including core and edge routers, fixed and modular Ethernet switches, 3G basestations, and secure routers. They also enhance the performance of medical imaging and military signal-processing systems.

“Cypress’s QDRII and QDRII provide the speed, density and low-latency that today’s high-performance networking solutions require,” said Bernhard Friebe, senior marketing manager for Altera’s high-end products. “Supporting the latest memory technologies like QDRII and QDRII in our Stratix V FPGAs, we enable our customers to maximize the capabilities of their end system.”

“The Stratix V FPGAs are bringing networking performance to a new level,” said, Sudhir Gopalswamy, senior director of Cypress’s Synchronous SRAM Business Unit. “We’re pleased to provide the memory technology that enables customers to get the full benefit of these advances.”

关于赛普拉斯
赛普拉斯提供各种高性能、混合信号、可编程解决方案,为客户产品能够快速上市赢得时间并提供卓越的系统价值。赛普拉斯的产品包括其旗舰产品 PSoC® 可编程片上系统系列及其衍生产品,比如 PowerPSoC® 高压和 LED 照明解决方案、CapSense® 触摸感应解决方案以及 TrueTouch® 触摸屏解决方案。赛普拉斯是 USB 控制器领域的全球领先者,它所拥有的高性能 West Bridge® 解决方案可加强多媒体手机的连接性并提高其性能。赛普拉斯同时在高性能存储器和可编程计时设备方面处于领先地位。赛普拉斯可为消费、移动电话、计算、数据通信、汽车、工业和军事等多种市场提供服务。Cypress trades on the Nasdaq Global Select Market under the ticker symbol CY. Visit Cypress online at https://www.cypress.com.

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Cypress, the Cypress logo, PSoC, PowerPSoC, CapSense, TrueTouch and West Bridge are registered trademarks of Cypress Semiconductor Corp. QDR and Quad Data Rate SRAMs comprise a family of products developed by Cypress, IDT, NEC Electronics, Renesas and Samsung All other trademarks are property of their owners.

 

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