CY2304SXC-1 | 赛普拉斯半导体
CY2304SXC-1
合格汽车 | 否 |
Core Voltage (V) | 3.3 |
I/O Voltage (V) | 3.3 |
Input Frequency Max. (MHz) | 133 |
Input Frequency Min. (MHz) | 10 |
Input Signal Type | LVCMOS/LVTTL |
最高工作温度 (°C) | 70 |
最高工作电压 (V) | 3.60 |
最低工作温度 (°C) | 0 |
最低工作电压 (V) | 3.00 |
No. of Outputs | 4 |
No. of PLL | 0 |
Output Frequency Max. (MHz) | 133 |
Output Frequency Min. (MHz) | 10 |
Output Signal Type | LVCMOS |
Spread Spectrum | 否 |
Tape & Reel | 否 |
温度分类 | 商用 |
Pricing & Inventory Availability
1-9 unit Price* | 10-24 unit Price* | 25-99 unit Price* | 100-249 unit Price* | 250-999 unit Price* | 1000+ unit Price* |
---|---|---|---|---|---|
$7.00 | $5.88 | $5.25 | $4.61 | $4.36 | $4.07 |
Packaging/Ordering
工具包
No. of Pins
8
Package Dimensions
193 L x 1.5 H x 150 W (Mils)
Package Weight
76.45 (mgs)
Package Cross Section Drawing
Package Carrier
TUBE
Package Carrier Drawing / Orientation
Standard Pack Quantity
2910
Minimum Order Quantity (MOQ)
485
Order Increment
485
Estimated Lead Time (days)
91
HTS Code
8542.39.0001
ECCN
无
ECCN Suball
EAR99
Quality and RoHS
Moisture Sensitivity Level (MSL)
3
Peak Reflow Temp. (°C)
260 (Cypress Reflow Profile)
符合有害物质限制 (RoHS) 标准
无铅
是
Lead/Ball Finish
Pure Sn;Ni/Pd/Au
Marking
IPC 1752 材料成分声明
Last Update: 2020 年 9 月 21 日
Last Update: 2020 年 4 月 15 日
Last Update: 2019 年 11 月 04 日
技术文档
产品变更通知 (PCN) (17)
2020 年 5 月 10 日
Addendum 2 Change in Qualification of Copper Wire Bonds for 56SSOP Products at OSE-Taiwan
2020 年 5 月 6 日
Change in Qualification of Copper Wire Bonds for select Lead Frame Products at OSE-Taiwan
2018 年 5 月 28 日
Changes to Minimum Order Quantity (MOQ) and Order Increment (OI) values on various Cypress Products.
2018 年 5 月 28 日
Changes to Minimum Order Quantity (MOQ) and Order Increment (OI) values on various Cypress Products
2018 年 5 月 28 日
Datasheet changes to the method of specification of IDDS and Duty Cycle in the Cypress Zero Delay Buffer (ZDB) products, CY2304, CY2305, CY2309 and CY2308
2018 年 5 月 28 日
Qualification of TSMC as an alternate wafer fabrication site for the Zero Delay Buffer General Purpose Clocks Family
2018 年 5 月 27 日
Additional Assembly Site qualified for NiPdAu Leadframe Pb-Free SOIC Packages
2018 年 5 月 27 日
Standardization of Moisture Sensitive Level (MSL) Classification for 8, 14 and 16 Lead 150 mil SOIC Pb-free SOIC packages assembled in OSE Taiwan and Amkor-Phil
2018 年 5 月 27 日
Correction to Affected Devices in PCN#071577: Qualification of 0.9-mil Au wire diameter for CCD and MID devices assembled at CML
2018 年 5 月 27 日
Standardization of Moisture Sensitivity Level (MSL) Classification for 8 and 16 lead 150 mils SOIC packages assembled at Cypress Manufacturing Limited (CML)
2017 年 10 月 24 日
Qualification of Copper Wire Bonds for select Lead Frame Products at Amko Philippines andn Cypress Philippines and transfer of PDIP and PLCC parts from MMT to Amkor
Advanced Product Change Notice (APCN) (3)
2018 年 5 月 27 日
Advance Notification - Transfer of Specific GP Clock Product Manufactured by Cypress Semiconductor Texas to Taiwan Semiconductor
Product Information Notice (PIN) (3)
2020 年 4 月 14 日
Addendum to PIN195102 - Manufacturing Label and Packing Configuration Standardization