FM24V10-GTR | 赛普拉斯半导体

FM24V10-GTR
Status: 生产中

数据手册

(pdf, 681.21 KB) RoHS PB Free

FM24V10-GTR

Development Kit
合格汽车
密度 (Kb)1024
频率 (MHz)3.4
接口I2C
最高工作温度 (°C)85
Max. Operating VCCQ (V)3.60
最高工作电压 (V)3.60
最低工作温度 (°C)-40
Min. Operating VCCQ (V)2.00
最低工作电压 (V)2.00
组织 (X x Y)128Kb x 8
Part FamilySerial FRAM
速率 (ns)0
Tape & Reel
温度分类工业

Pricing & Inventory Availability

1-9 unit Price* 10-24 unit Price* 25-99 unit Price* 100-249 unit Price* 250-999 unit Price* 1000+ unit Price*
$12.35 $11.05 $9.95 $8.78 $8.52 $8.19
Availability Quantity Ships In Buy from Cypress Buy from Distributors
Out of Stock 0 Please click here to check lead times

Packaging/Ordering

No. of Pins
8
Package Cross Section Drawing
Package Carrier
REEL
Package Carrier Drawing / Orientation
Standard Pack Quantity
2500
Minimum Order Quantity (MOQ)
2500
Order Increment
2500
Estimated Lead Time (days)
161
HTS Code
8542.32.0071
ECCN
ECCN Suball
EAR99

Quality and RoHS

Moisture Sensitivity Level (MSL)
3
Peak Reflow Temp. (°C)
符合有害物质限制 (RoHS) 标准
无铅
Lead/Ball Finish
Pure Sn

技术文档

产品变更通知 (PCN) (3)

2020 年 12 月 07 日
Qualification of Greatek as an Additional Assembly Site for Select 8-Lead SOIC Package on FRAM Products
2020 年 4 月 14 日
Qualification of Texas Instruments' DMOS6 as an Additional Wafer Fab Site, Cypress's Test 25 as an Additional Wafer Sort Site, OSE-Taiwan as an Additional Assembly Site for 32TSOP Package with Copper-Palladium-Gold Wire for Select 1Mb Parallel and Copper-Palladium Wire at UTAC-Thailand for Select 512Kb/1Mb Serial Industrial-Grade Products
2017 年 10 月 25 日
Standardization of Moisture Sensitive Level (MSL) Classification for F-RAM Products

Advanced Product Change Notice (APCN) (4)

2020 年 8 月 23 日
Q32020 Horizon Report Update
2020 年 4 月 22 日
Q220 Standard Horizon Report Update
2020 年 4 月 14 日
2020 Annual Horizon Report Update
2020 年 4 月 14 日
Q419 Horizon Report Update

Product Information Notice (PIN) (6)

2020 年 6 月 10 日
Manufacturing Label and Packing Configuration Standardization
2020 年 4 月 14 日
Addendum to PIN195102 - Manufacturing Label and Packing Configuration Standardization
2017 年 11 月 07 日
Qualification of an Additional Top Passivation Layer for F-RAM Devices
2017 年 11 月 06 日
Changes to Cypress Address Labels
2017 年 11 月 06 日
F-RAM PRODUCTS DATASHEET FORMAT CHANGES
2017 年 11 月 06 日
Changes to F-RAM Marking to Align with Cypress Standards

Verilog (1)

2017 年 3 月 22 日

IBIS (1)

2014 年 7 月 03 日