CY8C21x34/B | 赛普拉斯半导体


The PSoC family consists of many Mixed-Signal Array with On-Chip Controller devices. 这些器件旨在使用一个低成本的单芯片可编程元件取代多个基于 MCU 的传统系统元件。PSoC 器件包含多个可配置的模拟和数字逻辑模块,以及可编程互连。这种架构使得用户能够根据每个应用的要求,来创建定制的外设配置。Additionally, a fast CPU, Flash program memory, SRAM data memory, and configurable IOs are included in a range of convenient pinouts. The PSoC architecture consists of four main areas: the Core, the System Resources, the Digital System, and the Analog System. Configurable global bus resources allow combining all the device resources into a complete custom system.

Each CY8C21x34/B device includes four digital blocks and four analog blocks. Depending on the package, up to 28 general purpose IOs (GPIO) are also included. The GPIO provide access to the global digital and analog interconnects.



The CY8C21x34B device supports CapSense as well.  CapSense is ideal for proximity sensing and water tolerant designs. Enabled with SmartSense™ Auto-tuning, this family is easy to use and significantly reduces the design cycle time by eliminating the tuning process throughout the entire product development cycle from prototype to mass production. SmartSense tunes each CapSense sensor automatically at power up and then monitors and maintains optimum sensor performance during run time. This technology adapts for manufacturing variation in PCBs, overlays and noise generators such as LCD inverters, AC line noise and switch mode power supplies and automatically tunes them out.